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selecting architecture: confusing options

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marto1980

New member
Hello,

I am following https://www2.mmm.ucar.edu/wrf/OnLineTutorial/compilation_tutorial.php to compile WRF Model Version 4.2 on my x86_64 BSD machine with mpich, gfortran and gcc. At the configure step I get the screen below. I am confused by the way the options are presented. For example, for gfortran/gcc and dmpar I could select: 7, 52, 70, 141. Could you please advise me on the best option to select?

Thank you!

Best regards,
Martin

checking for perl5... no
checking for perl... found /usr/local/bin/perl (perl)
Will use NETCDF in dir: /home/marto/WRF/Build_WRF/LIBRARIES/netcdf
HDF5 not set in environment. Will configure WRF for use without.
PHDF5 not set in environment. Will configure WRF for use without.
Will use 'time' to report timing information
Configuring to use jasper library to build Grib2 I/O...

------------------------------------------------------------------------
Please select from among the following ARCH ARCH options:

1. (serial) 2. (smpar) 3. (dmpar) 4. (dm+sm) NEC SX (sxf90/sxcc)
5. (serial) 6. (smpar) 7. (dmpar) 8. (dm+sm) GNU (gfortran/gcc)
9. (serial) 10. (dmpar) GNU (g95/gcc)
11. (serial) 12. (smpar) 13. (dmpar) 14. (dm+sm) PGI (pgf90/gcc)
15. (serial) 16. (smpar) 17. (dmpar) 18. (dm+sm) PGI (pgf90/pgcc): SGI MPT
19. (serial) 20. (smpar) 21. (dmpar) 22. (dm+sm) PGI (pgf90/gcc): PGI accelerator
23. (serial) 24. (smpar) 25. (dmpar) 26. (dm+sm) INTEL (ifort/icc)
27. (dm+sm) INTEL (ifort/icc): Xeon Phi (MIC architecture)
28. (serial) 29. (smpar) 30. (dmpar) 31. (dm+sm) INTEL (ifort/icc): Xeon (SNB with AVX mods)
32. (serial) 33. (smpar) 34. (dmpar) 35. (dm+sm) INTEL (ifort/icc): SGI MPT
36. (serial) 37. (smpar) 38. (dmpar) 39. (dm+sm) INTEL (ifort/icc): IBM POE
40. (serial) 41. (smpar) 42. (dmpar) 43. (dm+sm) INTEL (ifort/icc): ia64
44. (serial) 45. (smpar) 46. (dmpar) 47. (dm+sm) INTEL (ifort/icc): SGI Altix
48. (serial) 49. (dmpar) PATHSCALE (pathf90/pathcc)
50. (serial) 51. (smpar) 52. (dmpar) 53. (dm+sm) GNU (gfortran/gcc)
54. (serial) 55. (smpar) 56. (dmpar) 57. (dm+sm) PGI (pgf90/pgcc)
58. (serial) 59. (smpar) 60. (dmpar) 61. (dm+sm) INTEL (ifort/icc)
62. (serial) 63. (smpar) 64. (dmpar) 65. (dm+sm) INTEL (ifort/clang)
66. (serial) 67. (dmpar) GNU (g95/gcc)
68. (serial) 69. (smpar) 70. (dmpar) 71. (dm+sm) GNU (gfortran/gcc)
72. (serial) 73. (smpar) 74. (dmpar) 75. (dm+sm) GNU (gfortran/clang)
76. (serial) 77. (dmpar) IBM (xlf90_r/cc)
78. (serial) 79. (smpar) 80. (dmpar) 81. (dm+sm) IBM (xlf90_r/cc_r)
82. (serial) 83. (smpar) 84. (dmpar) 85. (dm+sm) IBM (xlf90_r/cc_r)
86. (serial) 87. (smpar) 88. (dmpar) 89. (dm+sm) PGI (ftn/gcc): Cray XC CLE
90. (serial) 91. (smpar) 92. (dmpar) 93. (dm+sm) CRAY CCE (ftn $(NOOMP)/cc): Cray XE and XC
94. (serial) 95. (smpar) 96. (dmpar) 97. (dm+sm) INTEL (ftn/icc): Cray XC
98. (dmpar) IBM (blrts_xlf90/blrts_xlc): ppc64 Blue Gene\L
99. (smpar) 100. (dmpar) 101. (dm+sm) IBM (mpixlf90_r/mpixlc_r): ppc64 Blue Gene\P
102. (dmpar) IBM (xlf90_r/xlc_r): ppc64 IBM Blade
103. (serial) 104. (smpar) 105. (dmpar) 106. (dm+sm) PGI (pgf90/pgcc)
107. (serial) 108. (smpar) 109. (dmpar) 110. (dm+sm) PGI (pgf90/pgcc): Windows POSIX native
111. (serial) 112. (smpar) 113. (dmpar) 114. (dm+sm) PGI (pgf90/gcc): -f90=pgf90
115. (serial) 116. (smpar) 117. (dmpar) 118. (dm+sm) PGI (pgf90/pgcc): -f90=pgf90
119. (serial) 120. (smpar) 121. (dmpar) 122. (dm+sm) INTEL (ifort/icc): Open MPI
123. (serial) 124. (smpar) 125. (dmpar) 126. (dm+sm) GNU (gfortran/gcc): Open MPI
127. (serial) 128. (smpar) 129. (dmpar) 130. (dm+sm) PGI (pgf90/pgcc): -f90=pgf90
131. (serial) 132. (smpar) 133. (dmpar) 134. (dm+sm) INTEL (ifort/icc): HSW/BDW
135. (serial) 136. (smpar) 137. (dmpar) 138. (dm+sm) INTEL (ifort/icc): KNL MIC
139. (serial) 140. (smpar) 141. (dmpar) 142. (dm+sm) GNU (gfortran/gcc)
143. (serial) 144. (smpar) 145. (dmpar) 146. (dm+sm) FUJITSU (frtpx/fccpx): FX10/FX100 SPARC64 IXfx/Xlfx
 
I agree that these options (7, 52,70,141) look the same. Theoretically, any of them should work. Please try and let me know if there is any problem.
 
Hello,
Thank you very much for your reply. So I selected option 7 for the configuration. However, the compilation of the em_real case failed very quickly. The log.compile is attached. Any suggestions will be appreciated.

Best regards,
Martin
 

Attachments

  • log.compile
    185.4 KB · Views: 69
In your log file, there is one critical error:
sh: /lib/cpp: not found
cpp is a macro command that is required in building WRF and WPS. Please install this command and try again,
 
Martin,
1. Please let us know what kind of machine this is running on. For example, the OS, is this a cluster, is this a desktop, is this a virtual machine, on the cloud, etc.
2. Do a "uname -a" to let us see why the script is generating so many options.
3. Typically, the "cpp" is available along with the compiler. Is there a reason why a standard utility would likely not be available?
4. What compiler and version are you using?
5. Is this a standard Intel or AMD chip?
 
Hello,
Thank you very much for your replies.

Ming Chen: I have cpp on my machine, but it is not in /lib. Here is the output of whereis:
"marto_at_dragonfly% whereis cpp
cpp: /usr/bin/cpp /usr/share/man/man1/cpp.1.gz
"

davegill:
1. I am running DragonFly-5.8.1 on an ASUS ZENBOOK PRO I7-7700HQ/16GB/512GB SSD BLACK, Notebook mit 15,6 inch Display, Core i7 Processor, 16 GB RAM, 512 GB SSD, GeForce GTX1050 machine. My plan is to compile and run WRF locally on this machine with MPICH.

2. "marto_at_dragonfly% uname -a
DragonFly dragonfly 5.8-RELEASE DragonFly v5.8.1-RELEASE #1: Thu May 7 08:26:21 CEST 2020 root_at_:/usr/obj/usr/src/sys/X86_64_GENERIC x86_64"

3. "marto_at_dragonfly% which cpp
/usr/bin/cpp
"

4. Here is info on my compilers:
marto_at_dragonfly% gcc --version
gcc 8.3 [DragonFly] Release/2019-02-22
Copyright (C) 2018 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

marto_at_dragonfly% mpirun --version
HYDRA build details:
Version: 3.0.4
Release Date: Wed Apr 24 10:08:10 CDT 2013
CC: gcc -I/home/marto/WRF/Build_WRF/LIBRARIES/grib2/include -L/home/marto/WRF/Build_WRF/LIBRARIES/grib2/lib
CXX: g++ -I/home/marto/WRF/Build_WRF/LIBRARIES/grib2/include -L/home/marto/WRF/Build_WRF/LIBRARIES/grib2/lib
F77: gfortran -m64 -L/home/marto/WRF/Build_WRF/LIBRARIES/grib2/lib
F90: gfortran -m64 -L/home/marto/WRF/Build_WRF/LIBRARIES/grib2/lib
Configure options: '--disable-option-checking' '--prefix=/home/marto/WRF/Build_WRF/LIBRARIES/mpich' 'CC=gcc' 'LDFLAGS=-L/home/marto/WRF/Build_WRF/LIBRARIES/grib2/lib ' 'CPPFLAGS=-I/home/marto/WRF/Build_WRF/LIBRARIES/grib2/include -I/home/marto/WRF/Build_WRF/LIBRARIES/mpich-3.0.4/src/mpl/include -I/home/marto/WRF/Build_WRF/LIBRARIES/mpich-3.0.4/src/mpl/include -I/home/marto/WRF/Build_WRF/LIBRARIES/mpich-3.0.4/src/openpa/src -I/home/marto/WRF/Build_WRF/LIBRARIES/mpich-3.0.4/src/openpa/src -I/home/marto/WRF/Build_WRF/LIBRARIES/mpich-3.0.4/src/mpi/romio/include' 'CXX=g++' 'F77=gfortran' 'FFLAGS=-m64 -O2' 'FC=gfortran' 'FCFLAGS=-m64 -O2' '--cache-file=/dev/null' '--srcdir=.' 'CFLAGS= -O2' 'LIBS=-lpthread '
Process Manager: pmi
Launchers available: ssh rsh fork slurm ll lsf sge manual persist
Topology libraries available: hwloc
Resource management kernels available: user slurm ll lsf sge pbs cobalt
Checkpointing libraries available:
Demux engines available: poll select

5.It is an Intel chip:
"
marto_at_dragonfly% pciconf -lv
hostb0_at_pci0:0:0:0: class=0x060000 card=0x19701043 chip=0x59108086 rev=0x05 hdr=0x00
vendor = 'Intel Corporation'
device = 'Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers'
class = bridge
subclass = HOST-PCI
pcib1_at_pci0:0:1:0: class=0x060400 card=0x19701043 chip=0x19018086 rev=0x05 hdr=0x01
vendor = 'Intel Corporation'
device = 'Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor PCIe Controller (x16)'
class = bridge
subclass = PCI-PCI
vgapci1_at_pci0:0:2:0: class=0x030000 card=0x19701043 chip=0x591b8086 rev=0x04 hdr=0x00
vendor = 'Intel Corporation'
device = 'HD Graphics 630'
class = display
subclass = VGA
none0_at_pci0:0:4:0: class=0x118000 card=0x19701043 chip=0x19038086 rev=0x05 hdr=0x00
vendor = 'Intel Corporation'
device = 'Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor Thermal Subsystem'
class = dasp
xhci0_at_pci0:0:20:0: class=0x0c0330 card=0x201f1043 chip=0xa12f8086 rev=0x31 hdr=0x00
vendor = 'Intel Corporation'
device = '100 Series/C230 Series Chipset Family USB 3.0 xHCI Controller'
class = serial bus
subclass = USB
none1_at_pci0:0:20:2: class=0x118000 card=0x19701043 chip=0xa1318086 rev=0x31 hdr=0x00
vendor = 'Intel Corporation'
device = '100 Series/C230 Series Chipset Family Thermal Subsystem'
class = dasp
none2_at_pci0:0:21:0: class=0x118000 card=0x19701043 chip=0xa1608086 rev=0x31 hdr=0x00
vendor = 'Intel Corporation'
device = '100 Series/C230 Series Chipset Family Serial IO I2C Controller'
class = dasp
none3_at_pci0:0:21:1: class=0x118000 card=0x19701043 chip=0xa1618086 rev=0x31 hdr=0x00
vendor = 'Intel Corporation'
device = '100 Series/C230 Series Chipset Family Serial IO I2C Controller'
class = dasp
none4_at_pci0:0:22:0: class=0x078000 card=0x19701043 chip=0xa13a8086 rev=0x31 hdr=0x00
vendor = 'Intel Corporation'
device = '100 Series/C230 Series Chipset Family MEI Controller'
class = simple comms
pcib2_at_pci0:0:28:0: class=0x060400 card=0x19701043 chip=0xa1108086 rev=0xf1 hdr=0x01
vendor = 'Intel Corporation'
device = '100 Series/C230 Series Chipset Family PCI Express Root Port'
class = bridge
subclass = PCI-PCI
pcib3_at_pci0:0:28:2: class=0x060400 card=0x19701043 chip=0xa1128086 rev=0xf1 hdr=0x01
vendor = 'Intel Corporation'
device = '100 Series/C230 Series Chipset Family PCI Express Root Port'
class = bridge
subclass = PCI-PCI
pcib4_at_pci0:0:28:4: class=0x060400 card=0x19701043 chip=0xa1148086 rev=0xf1 hdr=0x01
vendor = 'Intel Corporation'
device = '100 Series/C230 Series Chipset Family PCI Express Root Port'
class = bridge
subclass = PCI-PCI
pcib5_at_pci0:0:29:0: class=0x060400 card=0x19701043 chip=0xa1188086 rev=0xf1 hdr=0x01
vendor = 'Intel Corporation'
device = '100 Series/C230 Series Chipset Family PCI Express Root Port'
class = bridge
subclass = PCI-PCI
isab0_at_pci0:0:31:0: class=0x060100 card=0x19701043 chip=0xa1528086 rev=0x31 hdr=0x00
vendor = 'Intel Corporation'
device = 'HM175 Chipset LPC/eSPI Controller'
class = bridge
subclass = PCI-ISA
none5_at_pci0:0:31:2: class=0x058000 card=0x19701043 chip=0xa1218086 rev=0x31 hdr=0x00
vendor = 'Intel Corporation'
device = '100 Series/C230 Series Chipset Family Power Management Controller'
class = memory
hdac0_at_pci0:0:31:3: class=0x040300 card=0x19701043 chip=0xa1718086 rev=0x31 hdr=0x00
vendor = 'Intel Corporation'
device = 'CM238 HD Audio Controller'
class = multimedia
subclass = HDA
none6_at_pci0:0:31:4: class=0x0c0500 card=0x19701043 chip=0xa1238086 rev=0x31 hdr=0x00
vendor = 'Intel Corporation'
device = '100 Series/C230 Series Chipset Family SMBus'
class = serial bus
subclass = SMBus
vgapci0_at_pci0:1:0:0: class=0x030200 card=0x19701043 chip=0x1c8d10de rev=0xa1 hdr=0x00
vendor = 'NVIDIA Corporation'
device = 'GP107M [GeForce GTX 1050 Mobile]'
class = display
subclass = 3D
none7_at_pci0:2:0:0: class=0xff0000 card=0x66211aea chip=0x66211aea rev=0x00 hdr=0x00
vendor = 'Alcor Micro'
device = 'AU6621 PCI-E Flash card reader controller'
iwm0_at_pci0:3:0:0: class=0x028000 card=0x00108086 chip=0x24fd8086 rev=0x78 hdr=0x00
vendor = 'Intel Corporation'
device = 'Wireless 8265 / 8275'
class = network
nvme0_at_pci0:111:0:0: class=0x010802 card=0xa801144d chip=0xa804144d rev=0x00 hdr=0x00
vendor = 'Samsung Electronics Co Ltd'
device = 'NVMe SSD Controller SM961/PM961'
class = mass storage
"

Thank you very much again. I am looking forward to your replies.

Best regards,
Martin
 
Hello,

I ended up making a symlink /lib/cpp to /usr/bin/cpp and commenting out all headers that import malloc.h:
"
find . -type f -exec sed -i '' 's/\#include <malloc.h>/\/*\#include <malloc.h> \*\//' {} \;
find . -type f -exec sed -i '' 's/\# include <malloc.h>/\/*\# include <malloc.h> \*\//' {} \;
find . -type f -exec sed -i '' 's/\# include <malloc\/malloc.h>/\/*\# include <malloc\/malloc.h> \*\//' {} \;
find . -type f -exec sed -i '' 's/\# include <malloc.h>/\/*\# include <malloc.h> \*\//' {} \;
"

The advice was given to me in BSD forums. The compilation now goes on for about 5 minutes before it finishes with the message:

"
Problems building executables, look for errors in the build log
"

The most prominent error seems to be:
"Fatal Error: Cannot open module file 'module_model_constants.mod' for reading at (1): No such file or directory"
The log.compile is attached.


Thank you very much.

Best regards,
Martin
 

Attachments

  • log.compile
    658.8 KB · Views: 62
Hello,
@Chen: Thank you very much for your reply.

So I pulled the repository anew and commented out all includes of malloc.h like this:

"
find . -type f -exec sed -i '' 's/\#include <malloc.h>/\/*\#include <malloc.h> \*\//' {} \;
find . -type f -exec sed -i '' 's/\# include <malloc.h>/\/*\# include <malloc.h> \*\//' {} \;
find . -type f -exec sed -i '' 's/\# include <malloc\/malloc.h>/\/*\# include <malloc\/malloc.h> \*\//' {} \;
find . -type f -exec sed -i '' 's/\# include <malloc.h>/\/*\# include <malloc.h> \*\//' {} \;
find . -type f -exec sed -i '' 's/\#include <sys\/malloc.h>/\/*\# include <sys\/malloc.h> \*\//' {} \;
"

Then I ran the configure script (configure.wrf is attached).
Finally, I ran "./compile em_real >& log.compile" (log.compile is attached).

Notable errors are:

"
/usr/libexec/binutils227/elf/ar: rsl_malloc.o: No such file or directory
*** [librsl_lite.a] Error code 1 (ignored)
/usr/libexec/binutils227/elf/ranlib: '/home/marto/WRF/Build_WRF/WRF/external/RSL_LITE/librsl_lite.a': No such file
"
and

"
sed: module_model_constants.F: No such file or directory
Fatal Error: Cannot open module file 'module_model_constants.mod' for reading at (1): No such file or directory
"

Thank you very much for your help. I am looking forward to your reply.

Best regards,
Martin
 

Attachments

  • log.compile
    906.8 KB · Views: 69
  • configure.wrf
    20.5 KB · Views: 68
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